1. Field of the Invention
The present invention relates to a method for manufacturing bipolar transistors, and more particular to the method which is applied to the manufacture of a double polysilicon layer self-aligned type bipolar transistor wherein a polysilicon layer for emitter impurity diffusion is formed prior to the formation of a polysilicon layer for leading out a base, and which forms a base layer and an emitter layer by solid-phase diffusion of impurities from the polysilicon layer.
2. Description of the Related Art
In a bipolar transistor-manufacturing method which forms an emitter layer by diffusing impurities from a polysilicon layer, the base layer and the emitter layer are formed as follows. First of all, an intrinsic base layer is formed by ion implantation of boron (B). Then, a polysilicon layer doped with arsenic (As) is formed on the intrinsic base layer. Thereafter, the emitter layer is formed by the solid-phase diffusion of arsenic from the polysilicon layer into the intrinsic base layer.
In order to manufacture a high-speed bipolar transistor, it is desirable that the base layer and the emitter layer be as shallow as possible. However, the implantation of boron ions is not suitable for forming a sufficiently shallow base layer since the implanted boron ions are likely to adversely affect the channeling and since the diffusion coefficient of boron is comparatively high.
A method which is known in the art to solve this problem is to form an intrinsic base layer by solid-phase diffusion of impurities from a polysilicon layer initially intended for emitter impurity diffusion. This method is applied to the process of manufacturing a double polysilicon layer self-aligned type bipolar transistor, wherein a polysilicon layer for leading out a base is formed prior to the formation of a polysilicon layer for emitter impurity diffusion. For example, the method is applied to the manufacture of an SST (super self-aligned transistor) proposed by NTT Corporation or the manufacture of a semiconductor device shown in Jpn. Pat. Appln. KOKOKU Publication No. 3-76575 filed by IBM.
However, the method which forms a base layer and an emitter layer by double diffusion of p-type and n-type impurities by using the polysilicon layer for emitter impurity diffusion as an impurity diffusion source has problems in light of (1) the controllability of base and emitter impurity diffusion and (2) the formation of a link region between the intrinsic and extrinsic base layers. These problems will be detailed below.
In a double polysilicon layer self-aligned type bipolar transistor wherein a polysilicon layer for leading out a base is formed prior to a polysilicon layer for emitter impurity diffusion, the latter polysilicon layer is deposited in a hole region whose aspect ratio is very high. Therefore, the thickness of that portion of the polysilicon layer which is located immediately above the emitter layer cannot be reliably controlled. In addition, the boron diffusion from the polysilicon layer for emitter impurity diffusion cannot be reliably controlled, either.
Moreover, the particle diameters of the polysilicon layer for emitter impurity diffusion increase during the boron diffusion, and the diffusion coefficient of the arsenic contained in the polysilicon layer greatly decreases. As a result, the arsenic in the polysilicon layer has such a concentration profile as is shown in FIG. 1. Because of such an arsenic concentration profile, the arsenic diffusion (emitter impurity diffusion), which is executed after the boron diffusion, cannot be reliably controlled.
In the case where the base layer and the emitter layer are formed by the double diffusion mentioned above, a p-type link region for connecting the extrinsic base layer and the intrinsic base layer must be provided, and this link region must be formed independently of the formation of the intrinsic base layer. A known method for forming such a link region is to introduce boron (p-type impurities) by ion implantation before either the polysilicon layer for defining the emitter width or the side walls of an oxide film are formed.
The link region must be a diffusion layer which is sufficiently shallow in comparison with an intrinsic base layer to be formed later. However, in the case where the base layer and the emitter later are formed by double diffusion, the base junction is very shallow and is 0.15 .mu.m or less, for example. It is therefore required that the Junction depth of the link region be less than 0.10 .mu.m.
In practice, however, such a shallow p-type diffusion layer is difficult to form by ion implantation, since the channeling is adversely affected by boron ions.
The link region mentioned above can be formed by the following two methods: (1) a method wherein BF.sub.2 ions are first implanted both to suppress the adverse effects on the channeling and to decrease the effective implantation energy of boron, then n-type impurities (e.g., phosphorus) are introduced into the region which is slightly deeper than the link region (base region) by ion implantation, and then the n-type impurity concentration of the collector located directly under the link region is increased, so as to obtain a shallow junction; and (2) a method wherein, when an emitter opening is formed by etching an oxide film before the polysilicon layer for emitter impurity diffusion is deposited, the substrate surface is over-etched such that the surface of the intrinsic base layer is lower in level than the surface of the link region, whereby the link region is made shallower than the intrinsic base layer.
However, the former method (1) is faced with the following problems. When the base layer and the emitter layer are formed by double diffusion, the solid-phase diffusion from the polysilicon layer is utilized for forming both of them. Although the active region does not have any irradiation defect due to ion implantation, the BF.sub.2 ion implantation executed for the formation of the link region inevitably produces a large number of irradiation defects, and the number of radiation damage thus produced is very large in comparison with the number of irradiation defects produced when boron ions are implanted into the base layer in an ordinary method for manufacturing bipolar transistors. On the other hand, the latter method (2) is faced with the following problems. When the substrate surface is over-etched, the etching accuracy cannot be easily controlled. In addition, since the side faces of the substrate which are formed by the over-etching serve as an emitter surface, the effective emitter width is inevitably different from the intended emitter width.
In an effort to solve these problems, the inventors of the present invention proposed how double diffusion should be performed and how a link region should be formed when such a transistor as the SST mentioned above was manufactured. The proposal is disclosed in Japanese Patent Application No. 3-343198 entitled "METHOD FOR MANUFACTURING HIGH-SPEED BIPOLAR TRANSISTOR".
However, in a double polysilicon layer self-aligned type bipolar transistor wherein a polysilicon layer for leading out a base is formed prior to the formation of a polysilicon layer for emitter impurity diffusion, the latter polysilicon layer is deposited in a hole region whose aspect ratio is very high, as mentioned above. Since boron (base impurity) is diffused from this polysilicon layer, the diffusion of the base impurity cannot be controlled reliably. Hence, the proposal made in the Japanese Patent Application No. 3-343198 has its limit.
It may be thought to manufacture the double polysilicon layer self-aligned type bipolar transistor by forming the two polysilicon layers in the opposite order, i.e., the polysilicon layer for emitter impurity diffusion is formed first, and then the polysilicon layer for leading out a base is formed. In such a bipolar transistor, the polysilicon layer for emitter impurity diffusion can be deposited to be as flat as possible, and the boron diffusion (base impurity diffusion) from this flat polysilicon layer can be controlled very reliably.
However, in the conventional double polysilicon layer self-aligned type bipolar transistor wherein a polysilicon layer for emitter impurity diffusion is formed prior to the formation of a polysilicon layer for leading out a base, an emitter layer is formed by diffusion such that it is self-aligned with the pattern of none other than the polysilicon layer for emitter impurity diffusion. Therefore, the double diffusion process mentioned above cannot be applied to the manufacture of the conventional bipolar transistor.
In order to apply the double diffusion process to the manufacture of the conventional NPN-type transistor, the desirable impurity concentrations in the base and emitter layers and the relationships between the diffusion coefficients of boron and arsenic have to be taken into consideration. It is therefore required that boron be first diffused from the polysilicon layer for emitter impurity diffusion (which contains the boron as base impurities), then arsenic (i.e., emitter impurities) be introduced into that polysilicon layer, and then the arsenic be diffused from the polysilicon layer, for the formation of an emitter layer.
However, the arsenic necessary for emitter impurity diffusion cannot be reliably introduced into the polysilicon layer after this polysilicon layer, which contains boron, is patterned.
As described above, according to the conventional art, a double polysilicon layer self-aligned type bipolar transistor wherein a polysilicon layer for emitter impurity diffusion is formed prior to the formation of a polysilicon layer for leading out a base, cannot be manufactured by utilization of the double diffusion process. To be specific, a base layer and an emitter layer cannot be sequentially formed by double diffusion of p- and n-type impurities from the polysilicon layer initially intended for emitter impurity diffusion.